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    MooreElite Assembly Service

    MooreElite Assembly Services, relying on the long-term strategic cooperation with TOP OSAT, provides one-stop assembly sevevice . Provided guarantee for the delivery, capacity and quality.

    Service List

    Assembly Design

    Substrate/Framework Design

    Chip/Package/Substrate Co-Simulation:Including Package structure stress, Signal Integrity, Power Integrity, thermal optimization

    Wafer Level Package, Fanout Design, Ceramic, Metal Packaging Design

    Assembly Mass Production

    Package Mass Production Management

    Link customer directly to OSAT

    Business status: mass production customers have reached 53, with shipments reaching 63.5KK/ month.

    SIP Design and Production

    MooreElite provides SiP services from solution development, substrate design, simulation, proofing and mass production. Moore elite has rich naked die resources, more than 25 years of experience in the solution development engineering team, 17 years of experience in the SiP design team, more than 50 SiP mass production solutions, the world's top three packaging resources. It has become a qualified supplier of CRRC, a partner of Bosch, a driverless partner of didi and a partner of top domestic universities and research institutes.

    Strength

    SIP Service Advantages
  • With years of successful SIP development experience, MooreElite has high-quality SIP development and production service delivery capability
  • With strategy alliance with Fabless at home and abroad, MooreElite can quickly acquire wafer/die resources such as MCU, RF transceiver, Bluetooth/BLE, NB-IOT, and sensors
  • Through long-term collaboration with system manufacturers, MooreElite can provide mature system solutions to achieve customer's functional requirements
  • Top Vendor Resource
  • TOP OSAT: ASE/Amkor/JECT/NTTF/TSHT
  • All Package Type
  • Packaging format includes DIP, SOP, SOT, QFN, BGA, FlipChip, FCBGA, SIP, WLCSP, Fanout and more.
  • One-stop Professional Services
  • One-stop professional services such as IP, design, tape, Packaging and testing at MooreElite Platform
  • Success Story

    Project 1
    Following is an MCU SiP case. In order to include two dies in the small package size, MooreElite designed a “sandwich” stacking SiP solution. By introducing one extra dummy die, we solved potential issues such as wire collapse, die cracking during the wire bonding. It only took 8 weeks from SiP design to engineering chip completed, and 200K chip production in 3 months.

    - Die positioning variation less than 20um variation.

    - The best wire bonding quality with advanced soldering technology.

    - SiP package above 99.7% yield for production.

    - Great customer satisfaction with small size, excellent performance, and proprietary security.

    Project 2

    Application:Photoelectric Sensor Module;

    Internal devices(14):Logic Gate Chip + Regulator + Triode + Diode+ Resistance Capacitance;

    Advantage:Small size, low cost, strong confidentiality, easy installation.

    Project3

    Application:Vehicle Sensing System;

    Internal devices (19):MCU + Millimeter Wave Chip + Humidity Sensor Chip + Optical Sensor Chip + Resistance Capacitor + Battery;

    Advantage:High Integration, Transparent Packaging, MEMS Packaging.

    Project 4

    Device information 1:

    Package type:QFN88L

    Package size:10X10X0.75mm

    Die size:2.2X2.1mm/2.3x2.2mm

    Wire dimeter:0.8mil Au wire

    Bond pad opening:52x54um

    Bond pad pitch:70um

    Technical challenges:With the “sandwich” lamination process, the problems such as wire sag and chip hidden crack are easy to occur due to three-time chip attaching and two-time wire bonding process. Because the top chip of the product is larger than the second layer chip (fake chip) which makes the lower part of the wire bonding area belongs to the suspended position. It will cause the phenomenon of poor welding by the shaking of the top chip during the wire bonding process. Therefore, high-precision chip attachment machine is adopted to control the chip placement error within 20um, and the most advanced multi-stage welding process is adopted in the wire bonding process to avoid poor welding problems. All these make the packaging yield over 99.7%, and no problems are found in the customer function test.

    Project 5

    Device information 2:

    Package type:QFN68L

    Package size:8X8X0.75mm

    Die size:2.2X2.1mm/2.3x2.2mm

    Wire dimeter:0.7mil Au wire

    Bond pad opening:45x48um

    Bond pad pitch:54um

    Technical challenges:With the two-layer chip lamination process, the angle of the wire from die1 to die2 is very inclined, the included angle is more than 45 degrees and the wire gap is less than twice wire diameter, which has exceeded the packaging design specification; on the other hand, because of the BPO (bond pad Opening) limit only 0.7mil gold wire can be used which will cause instable wire loop lead to wire touching problem during wire bonding process. Therefore, the most advanced PSL multi-stage ultra-low wire loop is adopted to realize the stability wire loop by controlling the bending point, height and tightness of wire loop. All these make the packaging yield over 99.5%, and no problems are found in customer test.

    Contact

  • Contact:Jiang Wu
  • Title:Technical Marketing Manager, Assembly Service BU
  • Phone:+86-13701992054
  • Email:assembly.service@mooreelite.com
  • 扫码加微信咨询
               

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    021-51137998  info@mooreelite.com            

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    MooreElite Group

    Contact Us
  • info@mooreelite.com
  • +86-021-51137892
  • 上海总部

    地址:

    上海市浦东新区荣科路118号2号楼

    邮编:

    201203

    Shanghai
    Building 2, No.118 Rongke Rd., Pudong Dist., Shanghai
    Beijing
    18F, Chuangfu Building, No.18 Danleng St., Haidian Dist., Beijing
    Shenzhen
    2F, Block E, Building 5, 2nd Haitian Rd., Nanshan Dist., Shenzhen, Guangdong Prov.
    Chengdu
    Room 900, Block A, No.3 Gaopeng Ave., Wuhou Dist., Chengdu, Sichuan Prov.
    SiP Production Site
    No.12 Shengke Rd, Huishan Economic Development Zone, Wuxi, Jiangsu Prov.
    Lead type ASSY Site
    5F, Building B, No.105 Middle XTBValley Rd., Yubei Dist., Chongqing
    Non lead type ASSY Site
    1F, Building 5, No.106 Chuangxin Rd., High-tech Zone, Hefei, Anhui Prov.
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